Semiconductor company leading in the the development of advanced power
delivery products for computing and telecom applications in their
design centre in Ireland. In your position as SENIOR LAYOUT ENGINEER ,
you will be responsible for leading complete chip level layouts of our
power management products from block level to top level and release to
production with a strong emphasis on growing and developing the layout
team and directing block level activities with remote sites
The successful Analog IC Layout Engineer is industry degree qualified
and has at least 8 years of experience in Analog IC Layout in a
similar role including the following skills and experiences:
* Practical hands-on experience in all aspects of layout design,
verification and debug
* Works with other senior members of the team to define and improve
team strategy, layout methodologies and tool use
* Cadence layout-(G)XL and Caliber proficiency
* Experience of electrically aware design including EM/IR/ESD and
constraints driven layout
* Extracting netlists and running basic simulations to assess EM/IR
a bonus
* Experienced in floorplanning and routing strategies, working in
cooperation with the design team
* Contribute to implementing and improving the digital-on-top design
flow
* Familiar with APR flow/Innovus and generating DEF files
* Familiar with layout in deep sub-micron processes, including
accounting for WPE, LOD, OPC, etc
* Able to generate and release final layout to full production
* Scripting for automating layout tasks
* Understanding of package layout and bonding requirements
* Experience of implementing DFM for automotive desired
* Experience of layout for power management a bonus, including BCD
processes, and physical design of drivers and power MOSFETs
KEY SOFT SKILLS:
* Strong analytical and debug skills for understanding and resolving
all aspects of layout verification
* Excellent team player and strong communicator, both verbal and
written
* Very organised, working to deliver to the agreed layout plan and
directing the work of block owners
* Help drive continuous productivity improvements in the group
* Manage layout reviews with the design team, documenting/presenting
agreements and actions
For more information and to apply, ?NOW and speak to Ane.
CONTACT NAME: Ane Bauer
REFERENCE: TJ/**Apply on the website**/V-**Apply on the website**
JOB ID: **Apply on the website**
A permanent position in Analog IC Layout has become available in a
Semiconductor company leading in the the development of advanced power
delivery products for computing and telecom applications in their
design centre in Ireland. In your position as SENIOR LAYOUT ENGINEER ,
you will be responsible for leading complete chip level layouts of our
power management products from block level to top level and release to
production with a strong emphasis on growing and developing the layout
team and directing block level activities with remote sites
The successful Analog IC Layout Engineer is industry degree qualified
and has at least 8 years of experience in Analog IC Layout in a
similar role including the following skills and experiences:
* Practical hands-on experience in all aspects of layout design,
verification and debug
* Works with other senior members of the team to define and improve
team strategy, layout methodologies and tool use
* Cadence layout-(G)XL and Caliber proficiency
* Experience of electrically aware design including EM/IR/ESD and
constraints driven layout
* Extracting netlists and running basic simulations to assess EM/IR
a bonus
* Experienced in floorplanning and routing strategies, working in
cooperation with the design team
* Contribute to implementing and improving the digital-on-top design
flow
* Familiar with APR flow/Innovus and generating DEF files
* Familiar with layout in deep sub-micron processes, including
accounting for WPE, LOD, OPC, etc
* Able to generate and release final layout to full production
* Scripting for automating layout tasks
* Understanding of package layout and bonding requirements
* Experience of implementing DFM for automotive desired
* Experience of layout for power management a bonus, including BCD
processes, and physical design of drivers and power MOSFETs
KEY SOFT SKILLS:
* Strong analytical and debug skills for understanding and resolving
all aspects of layout verification
* Excellent team player and strong communicator, both verbal and
written
* Very organised, working to deliver to the agreed layout plan and
directing the work of block owners
* Help drive continuous productivity improvements in the group
* Manage layout reviews with the design team, documenting/presenting
agreements and actions
For more information and to apply, ?NOW and speak to Ane.
CONTACT NAME: Ane Bauer
REFERENCE: TJ/**Apply on the website**/V-**Apply on the website**
JOB ID: **Apply on the website**
We need : English (Good)
Type: Permanent
Payment:
Category: Others
